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</style><table class="sidebar nomobile nowraplinks"><tbody><tr><th class="sidebar-title" style="font-size: 120%;">Computer architecture bit widths</th></tr><tr><th class="sidebar-heading" style="background-color: #ccccff;">
<a href="Word_(computer_architecture)" title="Word (computer architecture)">Bit</a></th></tr><tr><td class="sidebar-content">
<div class="hlist"><ul><li><a href="1-bit_computing" title="1-bit computing">1</a></li><li><a href="4-bit_computing" title="4-bit computing">4</a></li><li><a href="8-bit_computing" title="8-bit computing">8</a></li><li><a href="12-bit_computing" title="12-bit computing">12</a></li><li><a href="16-bit_computing" title="16-bit computing">16</a></li><li><a href="18-bit_computing" title="18-bit computing">18</a></li><li><a href="24-bit_computing" title="24-bit computing">24</a></li><li><a href="26-bit_computing" title="26-bit computing">26</a></li><li><a href="UNIVAC_490" title="UNIVAC 490">30</a></li><li><a href="31-bit_computing" title="31-bit computing">31</a></li><li><a href="32-bit_computing" title="32-bit computing">32</a></li><li><a href="36-bit_computing" title="36-bit computing">36</a></li><li><a href="45-bit_computing" title="45-bit computing">45</a></li><li><a href="60-bit_computing" title="60-bit computing">60</a></li><li><a href="64-bit_computing" title="64-bit computing">64</a></li><li><a href="128-bit_computing" title="128-bit computing">128</a></li><li><a href="256-bit_computing" title="256-bit computing">256</a></li><li><a href="512-bit_computing" title="512-bit computing">512</a></li><li><a href="Bit_slicing" title="Bit slicing">bit slicing</a></li></ul></div></td>
</tr><tr><th class="sidebar-heading" style="background-color: #ccccff;">
<a href="Application_software" title="Application software">Application</a></th></tr><tr><td class="sidebar-content">
<div class="hlist"><ul><li><a href="8-bit_computing" title="8-bit computing">8</a></li><li><a href="16-bit_computing#16-bit_application" title="16-bit computing">16</a></li><li><a href="32-bit_computing#32-bit_application" title="32-bit computing">32</a></li><li><a href="64-bit_computing#64-bit_applications" title="64-bit computing">64</a></li></ul></div></td>
</tr><tr><th class="sidebar-heading" style="background-color: #ccccff;">
<a href="Floating-point_arithmetic" title="Floating-point arithmetic">Binary floating-point</a> <a href="Precision_(computer_science)" title="Precision (computer science)">precision</a></th></tr><tr><td class="sidebar-content">
<div class="hlist"><ul><li><a href="Half-precision_floating-point_format" title="Half-precision floating-point format">16</a> (×½)</li><li><a href="Minifloat" title="Minifloat">24</a></li><li><a href="Single-precision_floating-point_format" title="Single-precision floating-point format">32</a> (×1)</li><li><a href="Extended_precision" title="Extended precision">40</a></li><li><a href="Double-precision_floating-point_format" title="Double-precision floating-point format">64</a> (×2)</li><li><a href="Extended_precision" title="Extended precision">80</a></li><li><a href="Quadruple-precision_floating-point_format" title="Quadruple-precision floating-point format">128</a> (×4)</li><li><a href="Octuple-precision_floating-point_format" title="Octuple-precision floating-point format">256</a> (×8)</li></ul></div></td>
</tr><tr><th class="sidebar-heading" style="background-color: #ccccff;">
<a href="Decimal_floating_point" title="Decimal floating point">Decimal floating-point</a> <a href="Precision_(computer_science)" title="Precision (computer science)">precision</a></th></tr><tr><td class="sidebar-content">
<div class="hlist"><ul><li><a href="Decimal32_floating-point_format" title="Decimal32 floating-point format">32</a></li><li><a href="Decimal64_floating-point_format" title="Decimal64 floating-point format">64</a></li><li><a href="Decimal128_floating-point_format" title="Decimal128 floating-point format">128</a></li></ul></div></td>
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<p>In <a href="Computer_architecture" title="Computer architecture">computer&nbsp;architecture</a>, <b>48-bit</b> <a href="Integer_(computer_science)" title="Integer (computer science)">integers</a> can represent 281,474,976,710,656 (2<sup>48</sup> or 2.814749767×10<sup>14</sup>) discrete values. This allows an <a href="Unsigned_integer" class="mw-redirect" title="Unsigned integer">unsigned</a> binary integer range of 0 through 281,474,976,710,655 (2<sup>48</sup> − 1) or a <a href="Signed_number_representations" title="Signed number representations">signed</a> <a href="Two's_complement" title="Two's complement">two's complement</a> range of −140,737,488,355,328 (−2<sup>47</sup>) through 140,737,488,355,327 (2<sup>47</sup> − 1). A 48-bit <a href="Memory_address" title="Memory address">memory address</a> can directly address every byte of 256 <a href="Terabyte" class="mw-redirect" title="Terabyte">terabytes</a> of storage. 48-bit can refer to any other <a href="Data_(computing)" class="mw-redirect" title="Data (computing)">data</a> unit that consumes 48 <a href="Bit" title="Bit">bits</a> (6 <a href="Octet_(computing)" title="Octet (computing)">octets</a>) in width. Examples include 48-bit <a href="Central_processing_unit" title="Central processing unit">CPU</a> and <a href="Arithmetic_logic_unit" title="Arithmetic logic unit">ALU</a> <a href="Computer_architecture" title="Computer architecture">architectures</a> that are based on <a href="Processor_register" title="Processor register">registers</a>, <a href="Address_bus" class="mw-redirect" title="Address bus">address buses</a>, or <a href="Bus_(computing)" title="Bus (computing)">data buses</a> of that size.
</p>
<meta property="mw:PageProp/toc">
<div class="mw-heading mw-heading2"><h2 id="Word_size">Word size</h2></div>
<p>Computers with 48-bit <a href="Word_(data_type)" class="mw-redirect" title="Word (data type)">words</a> include the <a href="AN/FSQ-32" title="AN/FSQ-32">AN/FSQ-32</a>, <a href="Control_Data_Corporation" title="Control Data Corporation">CDC</a> 1604/<a href="CDC_3000" class="mw-redirect" title="CDC 3000">upper-3000 series</a>, <a href="BESM-6" title="BESM-6">BESM-6</a>, <a href="Ferranti" title="Ferranti">Ferranti</a> <a href="Atlas_(computer)" title="Atlas (computer)">Atlas</a>, <a href="Philco" title="Philco">Philco</a> <a href="Philco_Transac_S-2000" class="mw-redirect" title="Philco Transac S-2000">TRANSAC S-2000</a> and <a href="Burroughs_large_systems" class="mw-redirect" title="Burroughs large systems">Burroughs large systems</a>.<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup>
</p><p>The Honeywell <a href="DATAmatic_1000" title="DATAmatic 1000">DATAmatic 1000</a>,
<a href="Honeywell_800" title="Honeywell 800">H-800</a>,
the <a href="MANIAC_II" title="MANIAC II">MANIAC II</a>,
the <a href="MANIAC_III" title="MANIAC III">MANIAC III</a>,
the <a href="Brookhaven_National_Laboratory" title="Brookhaven National Laboratory">Brookhaven National Laboratory</a> Merlin,<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup>
the <a href="Philco_computers#CXPQ" title="Philco computers">Philco CXPQ</a>,
the <a href="Ferranti_Orion" title="Ferranti Orion">Ferranti Orion</a>,
the <a href="Telefunken_Rechner_TR_440" class="mw-redirect" title="Telefunken Rechner TR 440">Telefunken Rechner TR 440</a>,
the <a href="ICT_1301" title="ICT 1301">ICT 1301</a>,
and many other early transistor-based and vacuum tube computers<sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup>
used 48-bit words.
</p>
<div class="mw-heading mw-heading2"><h2 id="Addressing">Addressing</h2></div>
<p>The <a href="IBM_System/38" title="IBM System/38">IBM System/38</a>, and the <a href="IBM_AS/400" title="IBM AS/400">IBM AS/400</a> in its <a href="Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a> variants, use 48-bit addresses.
</p><p>The address size used in <a href="Logical_block_addressing" title="Logical block addressing">logical block addressing</a> was increased to 48 bits with the introduction of <a href="AT_Attachment" class="mw-redirect" title="AT Attachment">ATA-6</a>. The <a href="Ext4" title="Ext4">Ext4</a> file system physically limits the file block count to 48 bits.
</p><p>The minimal implementation of the <a href="X86-64" title="X86-64">x86-64</a> architecture provides 48-bit addressing encoded into 64 bits; future versions of the architecture can expand this without breaking properly written applications.
</p><p>The media access control address (<a href="MAC_address" title="MAC address">MAC address</a>) of a <a href="Network_interface_controller" title="Network interface controller">network interface controller</a> uses a 48-bit address space.
</p>
<div class="mw-heading mw-heading2"><h2 id="Images">Images</h2></div>
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</style><div role="note" class="hatnote navigation-not-searchable">See also: <a href="Deep_color" class="mw-redirect" title="Deep color">Deep color</a></div>
<p>In digital images, 48 bits per pixel, or 16 bits per each color channel (red, green and blue), is used for accurate processing. For the human eye, it is almost impossible to see any difference between such an image and a 24-bit image, but the existence of more shades of each of the three primary colors (65,536 as opposed to 256) means that more operations can be performed on the image without risk of noticeable <a href="Colour_banding" title="Colour banding">banding</a> or <a href="Posterization" title="Posterization">posterization</a>.
</p>
<div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2></div>
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<div class="mw-references-wrap"><ol class="references">
<li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">The B5000, B5500 and B5700 took 3 bits in control words and numeric data for use as a tag; alphanumeric data and instruction syllables were stored in the full 48 bits and had no tags.</span>
</li>
<li id="cite_note-2"><span class="mw-cite-backlink"><b><a href="#cite_ref-2">^</a></b></span> <span class="reference-text">The B5900-B8xxx additionally had a 3- or 4-bit type tag.</span>
</li>
</ol></div></div>
<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>
<div class="reflist">
<div class="mw-references-wrap"><ol class="references">
<li id="cite_note-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-3">^</a></b></span> <span class="reference-text">
<a rel="nofollow" class="external text" href="http://ed-thelen.org/comp-hist/BRL61-m.html#MERLIN">"MERLIN"</a>.</span>
</li>
<li id="cite_note-4"><span class="mw-cite-backlink"><b><a href="#cite_ref-4">^</a></b></span> <span class="reference-text">
<a rel="nofollow" class="external text" href="https://retrocomputingforum.com/t/in-search-of-48-bit-computers/898">"In search of 48 bit computers"</a>.</span>
</li>
</ol></div></div>
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/* end https://en.wikipedia.org/ */
</style></div><div role="navigation" class="navbox" aria-labelledby="Processor_technologies439" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Processor_technologies439" style="font-size:114%;margin:0 4em"><a href="Processor_(computing)" title="Processor (computing)">Processor technologies</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Model_of_computation" title="Model of computation">Models</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Abstract_machine" title="Abstract machine">Abstract machine</a></li>
<li><a href="Stored-program_computer" title="Stored-program computer">Stored-program computer</a></li>
<li><a href="Finite-state_machine" title="Finite-state machine">Finite-state machine</a>
<ul><li><a href="Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li>
<li><a href="Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li>
<li><a href="Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li>
<li><a href="Queue_automaton" title="Queue automaton">Queue automaton</a></li>
<li><a href="Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li>
<li><a href="Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li>
<li><a href="Turing_machine" title="Turing machine">Turing machine</a>
<ul><li><a href="Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li>
<li><a href="Universal_Turing_machine" title="Universal Turing machine">Universal</a></li>
<li><a href="Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li>
<li><a href="Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li>
<li><a href="Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li>
<li><a href="Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li>
<li><a href="Hypercomputation" title="Hypercomputation">Hypercomputation</a></li>
<li><a href="Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li>
<li><a href="History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li>
<li><a href="Stack_machine" title="Stack machine">Stack machine</a></li>
<li><a href="Register_machine" title="Register machine">Register machines</a>
<ul><li><a href="Counter_machine" title="Counter machine">Counter</a></li>
<li><a href="Pointer_machine" title="Pointer machine">Pointer</a></li>
<li><a href="Random-access_machine" title="Random-access machine">Random-access</a></li>
<li><a href="Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Microarchitecture" title="Microarchitecture">Microarchitecture</a></li>
<li><a href="Von_Neumann_architecture" title="Von Neumann architecture">Von Neumann</a></li>
<li><a href="Harvard_architecture" title="Harvard architecture">Harvard</a>
<ul><li><a href="Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li>
<li><a href="Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li>
<li><a href="Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li>
<li><a href="Cellular_architecture" title="Cellular architecture">Cellular</a></li>
<li><a href="Endianness" title="Endianness">Endianness</a></li>
<li><a href="Computer_data_storage" title="Computer data storage">Memory access</a>
<ul><li><a href="Non-uniform_memory_access" title="Non-uniform memory access">NUMA</a></li>
<li><a href="Uniform_memory_access" title="Uniform memory access">HUMA</a></li>
<li><a href="Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li>
<li><a href="Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li>
<li><a href="Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li>
<li><a href="Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a>
<ul><li><a href="Virtual_memory" title="Virtual memory">Virtual memory</a></li>
<li><a href="Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li>
<li><a href="Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li>
<li><a href="Fabric_computing" title="Fabric computing">Fabric</a></li>
<li><a href="Multiprocessing" title="Multiprocessing">Multiprocessing</a></li>
<li><a href="Cognitive_computing" title="Cognitive computing">Cognitive</a></li>
<li><a href="Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_set_architecture" title="Instruction set architecture">Instruction set<br>architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li>
<li><a href="Complex_instruction_set_computer" title="Complex instruction set computer">CISC</a></li>
<li><a href="Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a></li>
<li><a href="Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li>
<li><a href="Explicit_data_graph_execution" title="Explicit data graph execution">EDGE</a>
<ul><li><a href="TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li>
<li><a href="Very_long_instruction_word" title="Very long instruction word">VLIW</a>
<ul><li><a href="Explicitly_parallel_instruction_computing" title="Explicitly parallel instruction computing">EPIC</a></li></ul></li>
<li><a href="Minimal_instruction_set_computer" title="Minimal instruction set computer">MISC</a></li>
<li><a href="One-instruction_set_computer" title="One-instruction set computer">OISC</a></li>
<li><a href="No_instruction_set_computing" title="No instruction set computing">NISC</a></li>
<li><a href="Zero_instruction_set_computer" class="mw-redirect" title="Zero instruction set computer">ZISC</a></li>
<li><a href="VISC_architecture" title="VISC architecture">VISC architecture</a></li>
<li><a href="Quantum_computing" title="Quantum computing">Quantum computing</a></li>
<li><a href="Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a>
<ul><li><a href="Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br>sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li>
<li><a href="VAX" title="VAX">VAX</a></li>
<li><a href="PDP-11_architecture" title="PDP-11 architecture">PDP-11</a></li>
<li><a href="X86" title="X86">x86</a></li>
<li><a href="ARM_architecture_family" title="ARM architecture family">ARM</a></li>
<li><a href="Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li>
<li><a href="MIPS_architecture" title="MIPS architecture">MIPS</a></li>
<li><a href="MIPS-X" title="MIPS-X">MIPS-X</a></li>
<li>Power
<ul><li><a href="IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li>
<li><a href="PowerPC" title="PowerPC">PowerPC</a></li>
<li><a href="Power_ISA" title="Power ISA">Power ISA</a></li></ul></li>
<li><a href="Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li>
<li><a href="SPARC" title="SPARC">SPARC</a></li>
<li><a href="SuperH" title="SuperH">SuperH</a></li>
<li><a href="DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li>
<li><a href="ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li>
<li><a href="M32R" title="M32R">M32R</a></li>
<li><a href="Unicore" title="Unicore">Unicore</a></li>
<li><a href="IA-64" title="IA-64">Itanium</a></li>
<li><a href="OpenRISC" title="OpenRISC">OpenRISC</a></li>
<li><a href="RISC-V" title="RISC-V">RISC-V</a></li>
<li><a href="MicroBlaze" title="MicroBlaze">MicroBlaze</a></li>
<li><a href="Little_man_computer" class="mw-redirect" title="Little man computer">LMC</a></li>
<li>System/3x0
<ul><li><a href="IBM_System/360_architecture" title="IBM System/360 architecture">S/360</a></li>
<li><a href="IBM_System/370" title="IBM System/370">S/370</a></li>
<li><a href="IBM_System/390" title="IBM System/390">S/390</a></li>
<li><a href="Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li>
<li>Tilera ISA</li>
<li><a href="VISC_architecture" title="VISC architecture">VISC architecture</a></li>
<li><a href="Adapteva" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li>
<li><a href="Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li>
<li><a href="Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li>
<li><a href="Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Data_dependency" title="Data dependency">Data dependency</a></li>
<li><a href="Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li>
<li><a href="Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li>
<li><a href="False_sharing" title="False sharing">False sharing</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Scoreboarding" title="Scoreboarding">Scoreboarding</a></li>
<li><a href="Tomasulo's_algorithm" title="Tomasulo's algorithm">Tomasulo's algorithm</a>
<ul><li><a href="Reservation_station" title="Reservation station">Reservation station</a></li>
<li><a href="Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li>
<li><a href="Register_renaming" title="Register renaming">Register renaming</a></li>
<li><a href="Wide-issue" title="Wide-issue">Wide-issue</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Branch_predictor" title="Branch predictor">Branch prediction</a></li>
<li><a href="Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Bit-level_parallelism" title="Bit-level parallelism">Bit</a>
<ul><li><a href="Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li>
<li><a href="Word_(computer_architecture)" title="Word (computer architecture)">Word</a></li></ul></li>
<li><a href="Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li>
<li><a href="Instruction_pipelining" title="Instruction pipelining">Pipelining</a>
<ul><li><a href="Scalar_processor" title="Scalar processor">Scalar</a></li>
<li><a href="Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li>
<li><a href="Task_parallelism" title="Task parallelism">Task</a>
<ul><li><a href="Thread_(computing)" title="Thread (computing)">Thread</a></li>
<li><a href="Process_(computing)" title="Process (computing)">Process</a></li></ul></li>
<li><a href="Data_parallelism" title="Data parallelism">Data</a>
<ul><li><a href="Vector_processor" title="Vector processor">Vector</a></li></ul></li>
<li><a href="Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li>
<li><a href="Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Temporal_multithreading" title="Temporal multithreading">Temporal</a></li>
<li><a href="Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a>
<ul><li><a href="Hyper-threading" title="Hyper-threading">Hyperthreading</a></li>
<li><a href="Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li>
<li><a href="Speculative_multithreading" title="Speculative multithreading">Speculative</a></li>
<li><a href="Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li>
<li><a href="Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Flynn's_taxonomy" title="Flynn's taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Single_instruction%2C_single_data" title="Single instruction, single data">SISD</a></li>
<li><a href="Single_instruction%2C_multiple_data" title="Single instruction, multiple data">SIMD</a>
<ul><li><a href="Single_instruction%2C_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li>
<li><a href="Flynn's_taxonomy#Pipelined_processor" title="Flynn's taxonomy">Pipelined processing</a></li>
<li><a href="Flynn's_taxonomy#Associative_processor" title="Flynn's taxonomy">Associative processing</a></li>
<li><a href="SWAR" title="SWAR">SWAR</a></li></ul></li>
<li><a href="Multiple_instruction%2C_single_data" title="Multiple instruction, single data">MISD</a></li>
<li><a href="Multiple_instruction%2C_multiple_data" title="Multiple instruction, multiple data">MIMD</a>
<ul><li><a href="Single_program%2C_multiple_data" title="Single program, multiple data">SPMD</a></li></ul></li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Computer_performance" title="Computer performance">Processor<br>performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Transistor_count" title="Transistor count">Transistor count</a></li>
<li><a href="Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC)
<ul><li><a href="Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li>
<li><a href="Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li>
<li><a href="FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li>
<li><a href="Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li>
<li><a href="SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li>
<li><a href="Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li>
<li><a href="Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li>
<li><a href="Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li>
<li><a href="Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)
<ul><li><a href="General-purpose_computing_on_graphics_processing_units" class="mw-redirect" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li>
<li><a href="Vector_processor" title="Vector processor">Vector</a></li>
<li><a href="Barrel_processor" title="Barrel processor">Barrel</a></li>
<li><a href="Stream_processing" title="Stream processing">Stream</a></li>
<li><a href="Tile_processor" title="Tile processor">Tile processor</a></li>
<li><a href="Coprocessor" title="Coprocessor">Coprocessor</a></li>
<li><a href="Programmable_Array_Logic" title="Programmable Array Logic">PAL</a></li>
<li><a href="Application-specific_integrated_circuit" title="Application-specific integrated circuit">ASIC</a></li>
<li><a href="Field-programmable_gate_array" title="Field-programmable gate array">FPGA</a></li>
<li><a href="Field-programmable_object_array" title="Field-programmable object array">FPOA</a></li>
<li><a href="Complex_programmable_logic_device" title="Complex programmable logic device">CPLD</a></li>
<li><a href="Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li>
<li><a href="System_in_a_package" title="System in a package">System in a package</a> (SiP)</li>
<li><a href="Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul>
</div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Embedded_system" title="Embedded system">Embedded system</a></li>
<li><a href="Microprocessor" title="Microprocessor">Microprocessor</a></li>
<li><a href="Microcontroller" title="Microcontroller">Microcontroller</a></li>
<li><a href="Mobile_processor" title="Mobile processor">Mobile</a></li>
<li><a href="Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li>
<li><a href="Application-specific_instruction_set_processor" title="Application-specific instruction set processor">ASIP</a></li>
<li><a href="Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br>on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</li>
<li><a href="Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li>
<li><a href="Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li>
<li><a href="Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware_acceleration" title="Hardware acceleration">Hardware<br>accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Coprocessor" title="Coprocessor">Coprocessor</a></li>
<li><a href="AI_accelerator" class="mw-redirect" title="AI accelerator">AI accelerator</a></li>
<li><a href="Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li>
<li><a href="Image_processor" title="Image processor">Image processor</a></li>
<li><a href="Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li>
<li><a href="Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li>
<li><a href="Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li>
<li><a href="Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li>
<li><a href="Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li>
<li><a href="Network_processor" title="Network processor">Network processor</a></li>
<li><a href="Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul>
</div></td></tr></tbody></table><div>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="1-bit_computing" title="1-bit computing">1-bit</a></li>
<li><a href="4-bit_computing" title="4-bit computing">4-bit</a></li>
<li><a href="8-bit_computing" title="8-bit computing">8-bit</a></li>
<li><a href="12-bit_computing" title="12-bit computing">12-bit</a></li>
<li><a href="Apollo_Guidance_Computer" title="Apollo Guidance Computer">15-bit</a></li>
<li><a href="16-bit_computing" title="16-bit computing">16-bit</a></li>
<li><a href="24-bit_computing" title="24-bit computing">24-bit</a></li>
<li><a href="32-bit_computing" title="32-bit computing">32-bit</a></li>

<li><a href="64-bit_computing" title="64-bit computing">64-bit</a></li>
<li><a href="128-bit_computing" title="128-bit computing">128-bit</a></li>
<li><a href="256-bit_computing" title="256-bit computing">256-bit</a></li>
<li><a href="512-bit_computing" title="512-bit computing">512-bit</a></li>
<li><a href="Bit_slicing" title="Bit slicing">bit slicing</a></li>
<li><a href="Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a>
<ul><li><a href="Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Single-core" title="Single-core">Single-core</a></li>
<li><a href="Multi-core_processor" title="Multi-core processor">Multi-core</a></li>
<li><a href="Manycore_processor" title="Manycore processor">Manycore</a></li>
<li><a href="Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Central_processing_unit" title="Central processing unit">Core</a></li>
<li><a href="Cache_(computing)" title="Cache (computing)">Cache</a>
<ul><li><a href="CPU_cache" title="CPU cache">CPU cache</a></li>
<li><a href="Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li>
<li><a href="Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li>
<li><a href="Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li>
<li><a href="Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li>
<li><a href="Cache_coherence" title="Cache coherence">coherence</a></li></ul></li>
<li><a href="Bus_(computing)" title="Bus (computing)">Bus</a></li>
<li><a href="Clock_rate" title="Clock rate">Clock rate</a></li>
<li><a href="Clock_signal" title="Clock signal">Clock signal</a></li>
<li><a href="FIFO_(computing_and_electronics)" title="FIFO (computing and electronics)">FIFO</a></li></ul>
</div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Execution_unit" title="Execution unit">Functional<br>units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li>
<li><a href="Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li>
<li><a href="Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li>
<li><a href="Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU)
<ul><li><a href="Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li>
<li><a href="Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li>
<li><a href="Branch_predictor" title="Branch predictor">Branch predictor</a></li>
<li><a href="Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li>
<li><a href="Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC)
<ul><li><a href="Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li>
<li><a href="Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Combinational_logic" title="Combinational logic">Combinational</a></li>
<li><a href="Sequential_logic" title="Sequential logic">Sequential</a></li>
<li><a href="Glue_logic" title="Glue logic">Glue</a></li>
<li><a href="Logic_gate" title="Logic gate">Logic gate</a>
<ul><li><a href="Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li>
<li><a href="Gate_array" title="Gate array">Array</a></li></ul></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Processor_register" title="Processor register">Processor register</a></li>
<li><a href="Status_register" title="Status register">Status register</a></li>
<li><a href="Stack_register" title="Stack register">Stack register</a></li>
<li><a href="Register_file" title="Register file">Register file</a></li>
<li><a href="Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li>
<li><a href="Memory_address_register" title="Memory address register">Memory address register</a></li>
<li><a href="Program_counter" title="Program counter">Program counter</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li>
<li><a href="Instruction_unit" title="Instruction unit">Instruction unit</a></li>
<li><a href="Data_buffer" title="Data buffer">Data buffer</a></li>
<li><a href="Write_buffer" title="Write buffer">Write buffer</a></li>
<li><a href="Microcode" title="Microcode">Microcode</a> <a href="ROM_image" title="ROM image">ROM</a></li>
<li><a href="Counter_(digital)" title="Counter (digital)">Counter</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Multiplexer" title="Multiplexer">Multiplexer</a></li>
<li><a href="Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li>
<li><a href="Adder_(electronics)" title="Adder (electronics)">Adder</a></li>
<li><a href="Binary_multiplier" title="Binary multiplier">Multiplier</a>
<ul><li><a href="CPU_multiplier" title="CPU multiplier">CPU</a></li></ul></li>
<li><a href="Binary_decoder" title="Binary decoder">Binary decoder</a>
<ul><li><a href="Address_decoder" title="Address decoder">Address decoder</a></li>
<li><a href="Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li>
<li><a href="Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Integrated_circuit" title="Integrated circuit">Integrated circuit</a>
<ul><li><a href="Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D</a></li>
<li><a href="Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li>
<li><a href="Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li>
<li><a href="Boolean_circuit" title="Boolean circuit">Boolean</a></li>
<li><a href="Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li>
<li><a href="Analogue_electronics" title="Analogue electronics">Analog</a></li>
<li><a href="Quantum_circuit" title="Quantum circuit">Quantum</a></li>
<li><a href="Switch#Electronic_switches" title="Switch">Switch</a></li></ul>
</div></td></tr></tbody></table><div>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Power_management" title="Power management">Power<br>management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Power_Management_Unit" title="Power Management Unit">PMU</a></li>
<li><a href="Advanced_Power_Management" title="Advanced Power Management">APM</a></li>
<li><a href="ACPI" title="ACPI">ACPI</a></li>
<li><a href="Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li>
<li><a href="Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li>
<li><a href="Clock_gating" title="Clock gating">Clock gating</a></li>
<li><a href="Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li>
<li><a href="Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li>
<li><a href="Processor_design" title="Processor design">Processor design</a></li>
<li><a href="Digital_electronics" title="Digital electronics">Digital electronics</a></li>
<li><a href="Hardware_security_module" title="Hardware security module">Hardware security module</a></li>
<li><a href="Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li>
<li><a href="Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li>
<li><a href="Pin_grid_array" title="Pin grid array">Pin grid array</a></li>
<li><a href="Chip_carrier" title="Chip carrier">Chip carrier</a></li></ul>
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